AMCC PPC405 Spezifikationen

Stöbern Sie online oder laden Sie Spezifikationen nach Prozessoren AMCC PPC405 herunter. AMCC PPC405 Specifications Benutzerhandbuch

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 58
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 0
Part Number 405GP
Revision 2.01 – January 6, 2005
AMCC 1
405GP
Power PC 405GP Embedded Processor
Data Sheet
Features
•PowerPC
®
405 32-bit RISC processor core
operating up to 266MHz
• Synchronous DRAM (SDRAM) interface operating
up to 133MHz
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8
check bits for ECC applications
• 4KB on-chip memory (OCM)
• External peripheral bus
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM and
external peripherals
- Up to eight devices
- External Mastering supported
• DMA support for external peripherals, internal
UART and memory
- Scatter-gather chaining supported
- Four channels
• PCI Revision 2.2 compliant interface (32-bit, up to
66MHz)
- Synchronous or asynchronous PCI Bus
interface
- Internal or external PCI Bus Arbiter
• Ethernet 10/100Mbps (full-duplex) support with
media independent interface (MII)
• Programmable interrupt controller supports seven
external and 19 internal edge triggered or level-
sensitive interrupts
• Programmable timers
• Two serial ports (16550 compatible UART)
• One IIC interface
• General purpose I/O (GPIO) available
• Supports JTAG for board level testing
• Internal processor local Bus (PLB) runs at SDRAM
interface frequency
• Supports PowerPC processor boot from PCI
memory
Description
Designed specifically to address embedded
applications, the PowerPC 405GP (PPC405GP)
provides a high-performance, low-power solution that
interfaces to a wide range of peripherals by
incorporating on-chip power management features
and lower power dissipation requirements.
This chip contains a high-performance RISC
processor core, SDRAM controller, PCI bus interface,
Ethernet interface, control for external ROM and
peripherals, DMA with scatter-gather support, serial
ports, IIC interface, and general purpose I/O.
Technology: CMOS SA-12E, 0.25 µm
(0.18 µm L
eff
)
Package: 456-ball (35mm or 27mm), or 413-ball
(25mm) enhanced plastic ball grid array (E-PBGA)
Power (typical): TBDW at 133MHz, 1.5W at 200MHz,
2W at 266MHz
Seitenansicht 0
1 2 3 4 5 6 ... 57 58

Inhaltsverzeichnis

Seite 1 - Data Sheet

Part Number 405GPRevision 2.01 – January 6, 2005AMCC 1405GPPower PC 405GP Embedded Processor Data SheetFeatures•PowerPC® 405 32-bit RISC processor co

Seite 2

405GP – Power PC 405GP Embedded Processor10 AMCCRevision 2.01 – January 6, 2005Data Sheet• Supports PCI target access to all PLB address spaces• Supp

Seite 3

405GP – Power PC 405GP Embedded ProcessorAMCC 11Revision 2.01 – January 6, 2005Data Sheet• Peripheral Device pacing with external “Ready”• External m

Seite 4

405GP – Power PC 405GP Embedded Processor12 AMCCRevision 2.01 – January 6, 2005Data SheetIIC Bus Interface• Compliant with Philips® Semiconductors I2

Seite 5

405GP – Power PC 405GP Embedded ProcessorAMCC 13Revision 2.01 – January 6, 2005Data SheetUniversal Interrupt Controller (UIC)The Universal Interrupt

Seite 6

405GP – Power PC 405GP Embedded Processor14 AMCCRevision 2.01 – January 6, 2005Data Sheet25mm, 413-Ball E-PBGA PackageA1.00 ∅ 0.635 SOLDER BALL x 413

Seite 7

405GP – Power PC 405GP Embedded ProcessorAMCC 15Revision 2.01 – January 6, 2005Data Sheet27mm, 456-Ball E-PBGA PackageAM1.0 TYP0.60 ± 0.1 SOLDERBALL

Seite 8

405GP – Power PC 405GP Embedded Processor16 AMCCRevision 2.01 – January 6, 2005Data Sheet35mm, 456-Ball E-PBGA PackageAM1.270.75 ± 0.15 SOLDERBALL x

Seite 9

405GP – Power PC 405GP Embedded ProcessorAMCC 17Revision 2.01 – January 6, 2005Data SheetPin ListsThe PPC405GP embedded controller is available as a

Seite 10 - Data Sheet

405GP – Power PC 405GP Embedded Processor18 AMCCRevision 2.01 – January 6, 2005Data SheetEMCTxEn J21 K23 Ethernet 36EMCTxErr K20 K25 Ethernet 36EOT0/

Seite 11

405GP – Power PC 405GP Embedded ProcessorAMCC 19Revision 2.01 – January 6, 2005Data SheetGNDAB9AB13AB14AB18AB22AC4AC23AD3AD24AE1AE2AE25AF1AF6AF81AF11

Seite 12

405GP – Power PC 405GP Embedded Processor2 AMCCRevision 2.01 – January 6, 2005Data SheetContentsOrdering, PVR, and JTAG Information . . . . . . . .

Seite 13

405GP – Power PC 405GP Embedded Processor20 AMCCRevision 2.01 – January 6, 2005Data SheetMemAddr0MemAddr1MemAddr2MemAddr3MemAddr4MemAddr5MemAddr6MemA

Seite 14

405GP – Power PC 405GP Embedded ProcessorAMCC 21Revision 2.01 – January 6, 2005Data SheetOVDDA11D11G10G15H9H10H14H15J7J8J10J14J16J17K3K4K8K16L23N1P8P

Seite 15

405GP – Power PC 405GP Embedded Processor22 AMCCRevision 2.01 – January 6, 2005Data SheetPCIAD0PCIAD1PCIAD2PCIAD3PCIAD4PCIAD5PCIAD6PCIAD7PCIAD8PCIAD9

Seite 16

405GP – Power PC 405GP Embedded ProcessorAMCC 23Revision 2.01 – January 6, 2005Data SheetPerAddr0PerAddr1PerAddr2PerAddr3PerAddr4PerAddr5PerAddr6PerA

Seite 17

405GP – Power PC 405GP Embedded Processor24 AMCCRevision 2.01 – January 6, 2005Data SheetPerData0PerData1PerData2PerData3PerData4PerData5PerData6PerD

Seite 18

405GP – Power PC 405GP Embedded ProcessorAMCC 25Revision 2.01 – January 6, 2005Data SheetReservedB19C16D18E2H3T21V20V21W22Y51AA8AB5A192 B173 C133 D20

Seite 19

405GP – Power PC 405GP Embedded Processor26 AMCCRevision 2.01 – January 6, 2005Data SheetVDDA13D12D13K9K15L9L10L14L15L20M10M14N4N9N10N14N15P9P15Y11Y1

Seite 20

405GP – Power PC 405GP Embedded ProcessorAMCC 27Revision 2.01 – January 6, 2005Data Sheet Signals Listed by Ball Assignment—413-Ball Package (Part 1

Seite 21

405GP – Power PC 405GP Embedded Processor28 AMCCRevision 2.01 – January 6, 2005Data SheetJ23 PCIAD21 M2 PerData9 P4 HoldAck T8 UART0_DTRK1 PerData12

Seite 22

405GP – Power PC 405GP Embedded ProcessorAMCC 29Revision 2.01 – January 6, 2005Data SheetW20 MemClkOut0 AA1 MemData26 AB5 Reserved AC9 ECC6W21 IRQ4[G

Seite 23

405GP – Power PC 405GP Embedded ProcessorAMCC 3Revision 2.01 – January 6, 2005Data SheetFiguresPPC405GP Embedded Controller Functional Block Diagram

Seite 24

405GP – Power PC 405GP Embedded Processor30 AMCCRevision 2.01 – January 6, 2005Data Sheet Signals Listed by Ball Assignment—456-Ball Package (Part 1

Seite 25

405GP – Power PC 405GP Embedded ProcessorAMCC 31Revision 2.01 – January 6, 2005Data SheetJ1 PerData23 M5VDD P23 PCIAD26 U5VDD J2 PerData26 M11 GND P2

Seite 26

405GP – Power PC 405GP Embedded Processor32 AMCCRevision 2.01 – January 6, 2005Data SheetAA25 PHYCol AC8 MemData12 AD17 BankSel0 AE26 TRSTAA26 GND AC

Seite 27

405GP – Power PC 405GP Embedded ProcessorAMCC 33Revision 2.01 – January 6, 2005Data SheetSignal ListThe following table provides a summary of the num

Seite 28

405GP – Power PC 405GP Embedded Processor34 AMCCRevision 2.01 – January 6, 2005Data SheetPull-Up and Pull-Down ResistorsPull-up and pull-down resisto

Seite 29

405GP – Power PC 405GP Embedded ProcessorAMCC 35Revision 2.01 – January 6, 2005Data SheetSignal Functional Description (Part 1 of 8)Multiplexed sign

Seite 30

405GP – Power PC 405GP Embedded Processor36 AMCCRevision 2.01 – January 6, 2005Data SheetPCIGnt0[Req]Gnt0 when internal arbiter is usedorReq when ext

Seite 31

405GP – Power PC 405GP Embedded ProcessorAMCC 37Revision 2.01 – January 6, 2005Data SheetSDRAM InterfaceMemData0:31Memory data bus.Notes:1. MemData0

Seite 32

405GP – Power PC 405GP Embedded Processor38 AMCCRevision 2.01 – January 6, 2005Data SheetPerCS0 Peripheral chip select bank 0. O5V tolerant 3.3V LVTT

Seite 33

405GP – Power PC 405GP Embedded ProcessorAMCC 39Revision 2.01 – January 6, 2005Data SheetExternal Master Peripheral InterfacePerClkPeripheral clock t

Seite 34

405GP – Power PC 405GP Embedded Processor4 AMCCRevision 2.01 – January 6, 2005Data SheetOrdering, PVR, and JTAG Information The part number conta

Seite 35

405GP – Power PC 405GP Embedded Processor40 AMCCRevision 2.01 – January 6, 2005Data SheetUART1_Tx UART1 Serial Data Out. O5V tolerant 3.3V LVTTL6UART

Seite 36

405GP – Power PC 405GP Embedded ProcessorAMCC 41Revision 2.01 – January 6, 2005Data SheetGPIO1[TS1E]GPIO2[TS2E]General Purpose I/OorEven Trace execut

Seite 37

405GP – Power PC 405GP Embedded Processor42 AMCCRevision 2.01 – January 6, 2005Data Sheet[TS3:6]GPIO5:8Trace status. To access this function, softwar

Seite 38

405GP – Power PC 405GP Embedded ProcessorAMCC 43Revision 2.01 – January 6, 2005Data SheetAbsolute Maximum Ratings The absolute maximum ratings below

Seite 39

405GP – Power PC 405GP Embedded Processor44 AMCCRevision 2.01 – January 6, 2005Data SheetRecommended DC Operating Conditions Device operation beyond

Seite 40

405GP – Power PC 405GP Embedded ProcessorAMCC 45Revision 2.01 – January 6, 2005Data Sheet5V-Tolerant Input Current Input Capacitance Parameter

Seite 41

405GP – Power PC 405GP Embedded Processor46 AMCCRevision 2.01 – January 6, 2005Data SheetTest ConditionsClock timing and switching characteristics ar

Seite 42

405GP – Power PC 405GP Embedded ProcessorAMCC 47Revision 2.01 – January 6, 2005Data Sheet Clocking WaveformClocking Specifications Symbol Parameter M

Seite 43

405GP – Power PC 405GP Embedded Processor48 AMCCRevision 2.01 – January 6, 2005Data SheetSpread Spectrum ClockingCare must be taken when using a spre

Seite 44

405GP – Power PC 405GP Embedded ProcessorAMCC 49Revision 2.01 – January 6, 2005Data SheetPeripheral Interface Clock Timings Parameter Min Max UnitsP

Seite 45

405GP – Power PC 405GP Embedded ProcessorAMCC 5Revision 2.01 – January 6, 2005Data SheetOrder Part Number Key Part NumberPPC405GP-3BE266CxPacka

Seite 46

405GP – Power PC 405GP Embedded Processor50 AMCCRevision 2.01 – January 6, 2005Data SheetInput Setup and Hold WaveformOutput Delay and Float Timing W

Seite 47

405GP – Power PC 405GP Embedded ProcessorAMCC 51Revision 2.01 – January 6, 2005Data SheetNotes: 1. In all of the following I/O Specifications tables

Seite 48

405GP – Power PC 405GP Embedded Processor52 AMCCRevision 2.01 – January 6, 2005Data SheetInternal Peripheral InterfaceIICSCL nananana1912IICSDA nanan

Seite 49

405GP – Power PC 405GP Embedded ProcessorAMCC 53Revision 2.01 – January 6, 2005Data Sheet I/O Specifications—133 and 200MHz Notes:1. The SDRAM com

Seite 50

405GP – Power PC 405GP Embedded Processor54 AMCCRevision 2.01 – January 6, 2005Data Sheet I/O Specifications—266MHz Notes:1. The SDRAM command inter

Seite 51

405GP – Power PC 405GP Embedded ProcessorAMCC 55Revision 2.01 – January 6, 2005Data SheetStrappingWhen the SysReset input is driven low by an externa

Seite 52

405GP – Power PC 405GP Embedded Processor56 AMCCRevision 2.01 – January 6, 2005Data SheetRevision LogPCI Divider from PLB 2, 3D18/A20GPIO1[TS1E]C20/C

Seite 53

405GP – Power PC 405GP Embedded ProcessorAMCC 57Revision 2.01 – January 6, 2005Data SheetPrinted in the United States of America, January 2005The fol

Seite 54

405GP – Power PC 405GP Embedded Processor58 AMCCRevision 2.01 – January 6, 2005Data SheetApplied Micro Circuits Corporation6290 Sequence Dr., San Die

Seite 55

405GP – Power PC 405GP Embedded Processor6 AMCCRevision 2.01 – January 6, 2005Data SheetPPC405GP Embedded Controller Functional Block DiagramThe PPC4

Seite 56

405GP – Power PC 405GP Embedded ProcessorAMCC 7Revision 2.01 – January 6, 2005Data SheetAddress Map SupportThe PPC405GP incorporates two simple and s

Seite 57

405GP – Power PC 405GP Embedded Processor8 AMCCRevision 2.01 – January 6, 2005Data SheetDCR Address Map 4KB Device Configuration RegistersFunction St

Seite 58

405GP – Power PC 405GP Embedded ProcessorAMCC 9Revision 2.01 – January 6, 2005Data SheetOn-Chip Memory (OCM)The OCM feature comprises a memory contro

Kommentare zu diesen Handbüchern

Keine Kommentare